Holistic Microarchitecture Optimizations for Energy-Efficient Circuits

What is it about?

Implementing custom hardware on field-programmable gate arrays (FPGAs) comes with a high degree of freedom. Small changes in system parameters such as throughput, latency and resource usage can heavily influence the size and energy efficiency of the generated microarchitecture. Our algorithm automatically determines all relevant parameters, leaving the user with the optimal circuit for their application.

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Photo by Maxence Pira on Unsplash

Photo by Maxence Pira on Unsplash

Why is it important?

The death of Moore’s law, coupled with the end of Dennard scaling demands application- and domain-specific computing architectures to maintain high resource- and energy efficiency. Our method provides a push-button flow to automatically generate highly optimized circuits in the context of model-based design and dataflow synthesis for HLS. The integration of clock gating into the synthesis flow allows us to turn off compute units whenever they are idle, keeping dynamic power consumption low without any compromise regarding throughput or resource consumption.