All Stories

  1. A Comparison of Deep Learning Approaches for Power-Based Side-Channel Attacks
  2. An Efficient and Unified RTL Accelerator Design for HQC-128, HQC-192, and HQC-256
  3. Post Quantum Cryptography Research Lines in the Italian Center for Security and Rights in Cyberspace
  4. Embedded Computer Systems: Architectures, Modeling, and Simulation
  5. A Quantum Method to Match Vector Boolean Functions using Simon's Solver
  6. Optimizing Quantum Circuit Synthesis with Dominator Analysis
  7. A Quantum Circuit to Execute a Key-Recovery Attack Against the DES and 3DES Block Ciphers
  8. Investigating the Health State of X.509 Digital Certificates
  9. Bit-Flipping Decoder Failure Rate Estimation for (v,w)-Regular Codes
  10. Design of a Quantum Walk Circuit to Solve the Subset-Sum Problem
  11. A High Efficiency Hardware Design for the Post-Quantum KEM HQC
  12. Performance and Efficiency Exploration of Hardware Polynomial Multipliers for Post-Quantum Lattice-Based Cryptosystems
  13. Differentially Private ORAM
  14. Privacy-Preserving Joins over Encrypted Data
  15. Top-k Query Processing on Encrypted Data
  16. A Versatile and Unified HQC Hardware Accelerator
  17. Quantum Circuit Design for the Lee-Brickell Based Information Set Decoding
  18. Fault Attacks Friendliness of Post-quantum Cryptosystems
  19. A Non Profiled and Profiled Side Channel Attack Countermeasure through Computation Interleaving
  20. Oblivious RAM (ORAM)
  21. Improving the Efficiency of Quantum Circuits for Information Set Decoding
  22. A flexible NTRU cryptographic accelerator for Application Specific Integrated Circuits
  23. An Efficient Unified Architecture for Polynomial Multiplications in Lattice-Based Cryptoschemes
  24. Oblivious Parallel RAM (OPRAM)
  25. Oblivious RAM (ORAM)
  26. Private Boolean Queries on Encrypted Data
  27. Secure Audit Logs
  28. Secure Index
  29. Quantum Computing Research Lines in the Italian Center for Supercomputing
  30. Locating Side Channel Leakage in Time through Matched Filters
  31. Profiled side channel attacks against the RSA cryptosystem using neural networks
  32. Shuffle Index
  33. Performance Bounds for QC-MDPC Codes Decoders
  34. A Complete Quantum Circuit to Solve the Information Set Decoding Problem
  35. Privacy-aware character pattern matching over outsourced encrypted data
  36. Integrating Side Channel Security in the FPGA Hardware Design Flow
  37. Metis: An Integrated Morphing Engine CPU to Protect Against Side Channel Attacks
  38. A Quantum Circuit to Speed-Up the Cryptanalysis of Code-Based Cryptosystems
  39. Analysis of In-Place Randomized Bit-Flipping Decoders for the Design of LDPC and MDPC Code-Based Cryptosystems
  40. Exploring Cortex-M Microarchitectural Side Channel Information Leakage
  41. Profiled Attacks Against the Elliptic Curve Scalar Point Multiplication Using Neural Networks
  42. Efficient Oblivious Substring Search via Architectural Support
  43. A comprehensive analysis of constant-time polynomial inversion for post-quantum cryptosystems
  44. Constant weight strings in constant time
  45. A Failure Rate Model of Bit-flipping Decoders for QC-LDPC and QC-MDPC Code-based Cryptosystems
  46. Working Age: Providing Occupational Safety through Pervasive Sensing and Data Driven Behavior Modeling
  47. Decision Support Systems to Promote Health and Well-Being of People During Their Working Age: The Case of the WorkingAge EU Project
  48. Plaintext recovery attacks against linearly decryptable fully homomorphic encryption schemes
  49. Evaluating the Trade-offs in the Hardware Design of the LEDAcrypt Encryption Functions
  50. A Finite Regime Analysis of Information Set Decoding Algorithms
  51. A secure and authenticated host-to-memory communication interface
  52. Compiler-based Techniques to Secure Cryptographic Embedded Software against Side Channel Attacks
  53. Accelerating Automotive Analytics: The M2DC Appliance Approach
  54. LEDAcrypt: QC-LDPC Code-Based Cryptosystems with Bounded Decryption Failure Rate
  55. Scramble Suit: A Profile Differentiation Countermeasure to Prevent Template Attacks
  56. Privacy preserving substring search protocol with polylogarithmic communication cost
  57. Systematic parsing of X.509: Eradicating security issues with a parse tree
  58. Reactive side-channel countermeasures: Applicability and quantitative security evaluation
  59. A Comprehensive Side-Channel Information Leakage Analysis of an In-Order RISC CPU Microarchitecture
  60. M2DC—A Novel Heterogeneous Hyperscale Microserver Platform
  61. Software-only Reverse Engineering of Physical DRAM Mappings for Rowhammer Attacks
  62. OpenCL HLS Based Design of FPGA Accelerators for Cryptographic Primitives
  63. Side-channel security of superscalar CPUs : Evaluating the Impact of Micro-architectural Features
  64. Three-Server Swapping for Access Confidentiality
  65. Enforcing authorizations while protecting access confidentiality1
  66. LEDAkem: A Post-quantum Key Encapsulation Mechanism Based on QC-LDPC Codes
  67. Side-channel security of superscalar CPUs
  68. Comparison-Based Attacks Against Noise-Free Fully Homomorphic Encryption Schemes
  69. Access Privacy in the Cloud
  70. The M2DC Approach towards Resource-efficient Computing
  71. A Novel Regular Format for X.509 Digital Certificates
  72. M2DC – Modular Microserver DataCentre with heterogeneous hardware
  73. A Security Audit of the OpenPGP Format
  74. A Dynamic Tree-Based Data Structure for Access Privacy in the Cloud
  75. A privacy-preserving encrypted OSN with stateless server interaction: The Snake design
  76. V2I Cooperation for Traffic Management with SafeCop
  77. The M2DC Project: Modular Microserver DataCentre
  78. Safe cooperative CPS: A V2I traffic management scenario in the SafeCOP project
  79. Data centres for IoT applications: The M2DC approach (Invited paper)
  80. Automated instantiation of side-channel attacks countermeasures for software cipher implementations
  81. A Fault-Based Secret Key Retrieval Method for ECDSA
  82. Access Control for the Shuffle Index
  83. A Note on Fault Attacks Against Deterministic Signature Schemes (Short Paper)
  84. Encasing block ciphers to foil key recovery attempts via side channel
  85. Shuffle Index
  86. Foreword:
  87. Cyber-security analysis and evaluation for smart home management solutions
  88. The MEET Approach: Securing Cryptographic Embedded Software Against Side Channel Attacks
  89. Information leakage chaff
  90. Trace-based schedulability analysis to enhance passive side-channel attack resilience of embedded software
  91. Challenging the Trustworthiness of PGP: Is the Web-of-Trust Tear-Proof?
  92. Trusted Computing for Embedded Systems
  93. Towards Transparently Tackling Functionality and Performance Issues across Different OpenCL Platforms
  94. Protecting Access Confidentiality with Data Distribution and Swapping
  95. Practical Cryptography
  96. Fault Sensitivity Analysis at Design Time
  97. Computer Security Anchors in Smart Grids: The Smart Metering Scenario and Challenges
  98. Design space extension for secure implementation of block ciphers
  99. Symmetric Key Encryption Acceleration on Heterogeneous Many-Core Architectures
  100. Security challenges in building automation and SCADA
  101. Securing software cryptographic primitives for embedded systems against side channel attacks
  102. OpenCL performance portability for general-purpose computation on graphics processor units: an exploration on cryptographic primitives
  103. Snake: An End-to-End Encrypted Online Social Network
  104. A multiple equivalent execution trace approach to secure cryptographic embedded software
  105. Security Integration in Medical Device Design: Extension of an Automated Bio-Medical Engineering Design Methodology
  106. [Copyright notice]
  107. On Task Assignment in Data Intensive Scalable Computing
  108. On the Security of Partially Masked Software Implementations
  109. Differential Fault Analysis for Block Ciphers
  110. A Multiple Equivalent Execution Trace Approach to Secure Cryptographic Embedded Software
  111. Preface
  112. Supporting concurrency and multiple indexes in private access to outsourced data1
  113. A fault induction technique based on voltage underfeeding with application to attacks against AES and RSA
  114. Drop-In Control Flow Hijacking Prevention through Dynamic Library Interception
  115. Security Analysis of Building Automation Networks
  116. Distributed Shuffling for Preserving Access Confidentiality
  117. Secure and efficient design of software block cipher implementations on microcontrollers
  118. Enhancing Passive Side-Channel Attack Resilience through Schedulability Analysis of Data-Dependency Graphs
  119. Compiler-based side channel vulnerability analysis and optimized countermeasures application
  120. Theory and Practice of Cryptography Solutions for Secure Information Systems
  121. Automated Security Analysis of Dynamic Web Applications through Symbolic Code Execution
  122. A code morphing methodology to automate power analysis countermeasures
  123. Injection Technologies for Fault Attacks on Microprocessors
  124. Smart metering in power grids: Application scenarios and security
  125. Security and Privacy in Smart Grid Infrastructures
  126. Efficient and Private Access to Outsourced Data
  127. Selective Exchange of Confidential Data in the Outsourcing Scenario
  128. Supporting Concurrency in Private Data Outsourcing
  129. Fault attack to the elliptic curve digital signature algorithm with multiple bit faults
  130. Information Leakage Discovery Techniques to Enhance Secure Chip Design
  131. Search over Encrypted Data
  132. Secure Audit Logs
  133. Secure Index
  134. Secure Logging
  135. Fault attack on AES with single-bit induced faults
  136. Low voltage fault attacks to AES
  137. Encryption-Based Policy Enforcement for Cloud Storage
  138. Record Setting Software Implementation of DES Using CUDA
  139. SMaC
  140. Countermeasures against fault attacks on software implemented AES
  141. Improving first order differential power attacks through digital signal processing
  142. Fast Disk Encryption through GPGPU Acceleration
  143. Low Voltage Fault Attacks on the RSA Cryptosystem
  144. A Transform-Parametric Approach to Boolean Matching
  145. Design of a parallel AES for graphics hardware using the CUDA framework
  146. A pairing SW implementation for Smart-Cards
  147. A FPGA Coprocessor for the Cryptographic Tate Pairing over Fp
  148. Preserving confidentiality of security policies in data outsourcing
  149. Programming Highly Parallel Reconfigurable Architectures for Symmetric and Asymmetric Cryptographic Applications
  150. Countermeasures Against Branch Target Buffer Attacks
  151. Countermeasures Against Branch Target Buffer Attacks
  152. Program Organization
  153. A Unified Approach to Canonical Form-based Boolean Matching
  154. Programming Highly Parallel Reconfigurable Architectures for Public-Key Cryptographic Applications
  155. A unified approach to canonical form-based Boolean matching
  156. Computational intelligence techniques to detect toxic gas presence
  157. Parallel Hardware Architectures for the Cryptographic Tate Pairing
  158. Software implementation of Tate pairing over GF(2/sup m/)
  159. Efficient implementations of mobile video computations on domain-specific reconfigurable arrays
  160. The Role of the Normal Phonon–Phonon Scattering in the Lattice Thermal Conductivity and Phonon Drag in Metals at Low Temperatures
  161. The lattice thermal conductivity of aluminium at low temperatures
  162. Magnetic susceptibility of the singlet ground-state system (LaPr)Sn3
  163. Design Time Engineering of Side Channel Resistant Cipher Implementations