Multi-Profile Encryption on FPGA for Cyber-Physical Systems

What is it about?

In the context of Cyber-Physical Systems (CPS), which combine computing and physical elements, flexibility and adaptability are crucial. These systems need to handle changing internal and external conditions, such as battery levels and critical tasks. One common requirement in CPS is cryptography, which ensures secure communication between devices. Now, let’s focus on our solution: a reconfigurable FPGA accelerator designed for AES workloads with different key lengths. Imagine this accelerator as a specialized chip that speeds up encryption tasks. What makes it unique is its ability to adapt—like a shape-shifting tool—to handle various encryption keys. To achieve efficient execution, the accelerator uses tagged-dataflow models. These models are a way to organize tasks so they can be performed concurrently. This approach not only maintains high performance but also conserves resources (both energy and hardware) compared to non-reconfigurable accelerators. In summary, this work introduces an adaptive solution that balances performance, flexibility, and efficiency while ensuring private communication in CPS.

Featured Image

Photo by Sourabh Belekar on Unsplash

Photo by Sourabh Belekar on Unsplash

Why is it important?

CPS are vulnerable systems, and cryptography certainly mitigates threats. On the other hand, in general, a multi-profile flexible solution effectively provides interoperability. Nonetheless, there is no free lunch, and that can be paid in terms of resource utilization and energy consumption. Our solution realizes the perfect compromise between flexibility and performance.