This shareable PDF can be hosted on any platform or network and is fully compliant with publisher copyright.
This publication has not yet been explained in plain language by the author(s). However, you can still read the publication.
If you are one of the authors, claim this publication so you can create a plain language summary to help more people find, understand and use it.
This page is a summary of: Optimizing Temporal Convolutional Network Inference on FPGA-Based Accelerators, IEEE Journal on Emerging and Selected Topics in Circuits and Systems, September 2020, Institute of Electrical & Electronics Engineers (IEEE),
DOI: 10.1109/jetcas.2020.3014503.
You can read the full text:
The following have contributed to this page
