High Speed Level Converters With Short Circuit Current Reduction

What is it about?

The level converter is used as interface between low voltages to high voltage boundary. The efficient level converter has less power consumption and less delay are the design considerations of the level shifter. In this paper two new CMOS level converters are presented with high driving capability and low propagation delay. The proposed level converters are simulated using Cadence software with 0.18 µm CMOS technology. The simulation result shows that the proposed circuits have less propagation delay than existing ones. The circuits are simulated with different load capacitor values and different voltages. The proposed level converters operate for different input pulse signal amplitude values are +0.8 V, +1 V, +1.2 V and VDDH values of +1.8 V and +3.3 V.

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Why is it important?

Two Level converters with less delay are proposed using leakage current reduction technique. In leakage current reduction technique used in the existing circuit uses NMOS transistors as resistors by replacing NMOS transistors with PMOS transistors due to higher resistance of PMOS transistors speed performance of proposed circuits is improved. In the existing circuit’s diode connected transistors drop a voltage Vth, by removing diode connected transistors speed performance of the circuit is further improved with small increase in raise time and decrease in fall time value in proposed level converter-II. Advantage of proposed level converter-I is it has less raise time.