What is it about?
The continuous improvements in the computational capabilities of quantum computers threaten today's widely deployed asymmetric cryptographic algorithms. In a few decades, an attacker with quantum capabilities will be able to break RSA and elliptic curve-based cryptographic schemes. Therefore, assessing new alternatives capable of withstanding cryptanalysis from quantum computers is imperative. Among many proposals, NTRU cryptographic scheme is a fast and efficient algorithm that has withstood over two decades of cryptanalysis. We analyzed the NTRU algorithm submitted to NIST's Post-Quantum standardization process for the third selection round and proposed a flexible hardware design optimized for ASIC targets. We then produced and assessed low-latency and compact solutions using a 40 nm technology library.
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Why is it important?
In our modular design, it is possible to replace any algorithm composing the NTRU scheme, allowing us to produce designs with different area/time trade-offs. Moreover, this design choice also reduces the time-to-market when adapting the design in the case of revisions of the NTRU cryptographic algorithm.
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This page is a summary of: A Flexible ASIC-Oriented Design for a Full NTRU Accelerator, January 2023, ACM (Association for Computing Machinery),
DOI: 10.1145/3566097.3567916.
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