FPGA based practical implementation of NPC-MLI with SVPWM for an autonomous operation PV system with capacitor balancing

What is it about?

This paper presents the field programmable gate array (FPGA) based capacitor imbalancing control scheme of neutral point clamped multilevel inverters (NPC-MLI) for standalone autonomous Photo-voltaic (PV) system using innovative space vector PWM (SVPWM) scheme. The suggested vector selection based PWM offers an excellent performance to NPC-MLI to control the capacitor balancing by using selected three vector (STV) scheme

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Why is it important?

An SVPWM pattern to balancing the capacitor for PV connected NPC-MLI is developed. • The proposed scheme limits the DC-link imbalance up to 0.25% with minimum THD. • FPGA based implementation with high DC link utilization. • Implementation more effectual in items of hardware utilization and processing speed. • Proposed SVM schemes maintains the volt-sec balance throughout the working range.