All Stories

  1. Hierarchical Integration of Reinforcement Learning and Optimization Algorithms for Time-Efficient Design Automation of Complex Analog Circuit
  2. TL-CSE: Microarchitecture-Compiler Co-design Space Exploration via Transfer Learning
  3. Revisiting sensitivity-based analog sizing with derivative-aware Bayesian optimization and error-suppressed adjoint analysis
  4. FSMM: An Efficient Matrix Multiplication Accelerator Supporting Flexible Sparsity
  5. Physically Aware Synthesis Revisited: Guiding Technology Mapping with Primitive Logic Gate Placement
  6. AnalogGym: An Open and Practical Testing Suite for Analog Circuit Synthesis
  7. The Power of Graph Signal Processing for Chip Placement Acceleration
  8. PriorMSM: An Efficient Acceleration Architecture for Multi-Scalar Multiplication
  9. Gypsophila: A Scalable and Bandwidth-Optimized Multi-Scalar Multiplication Architecture
  10. Efficient ILT via Multigrid-Schwartz Method
  11. HiMOSS: A Novel High-dimensional Multi-objective Optimization Method via Adaptive Gradient-Based Subspace Sampling for Analog Circuit Sizing
  12. EVDMARL: Efficient Value Decomposition-based Multi-Agent Reinforcement Learning with Domain-Randomization for Complex Analog Circuit Design Migration
  13. Artisan: Automated Operational Amplifier Design via Domain-specific Large Language Model
  14. HMNTT: A Highly Efficient MDC-NTT Architecture for Privacy-preserving Applications
  15. Aries: A DNN Inference Scheduling Framework for Multi-core Accelerators
  16. Can Large Language Models Be Good Companions?
  17. FullSparse: A Sparse-Aware GEMM Accelerator with Online Sparsity Prediction
  18. D 3 PBO: D ynamic D omain D ecomposition based P arallel B aye...
  19. MACRO: Multi-agent Reinforcement Learning-based Cross-layer Optimization of Operational Amplifier
  20. Yield Optimization for Analog Circuits over Multiple Corners via Bayesian Neural Network: Enhancing Circuit Reliability under Environmental Variation
  21. CASES
  22. Graph Representation Learning for Microarchitecture Design Space Exploration
  23. TPNoC: An Efficient Topology Reconfigurable NoC Generator
  24. Guest Editor's Introduction: Machine Learning for VLSI Physical Design
  25. GraphPlanner: Floorplanning with Graph Neural Network
  26. Unveiling Causal Attention in Dogs' Eyes with Smart Eyewear
  27. ESPSim: An Efficient Scalable Power Grid Simulator Based on Parallel Algebraic Multigrid
  28. Efficient Layout Hotspot Detection via Neural Architecture Search
  29. LinEasyBO: Scalable Bayesian Optimization Approach for Analog Circuit Synthesis via One-Dimensional Subspaces
  30. Floorplanning with graph attention
  31. Do Smart Glasses Dream of Sentimental Visions?
  32. Automated Compensation Scheme Design for Operational Amplifier via Bayesian Optimization
  33. A Robust Batch Bayesian Optimization for Analog Circuit Synthesis via Local Penalization
  34. An Efficient Multi-fidelity Bayesian Optimization Approach for Analog Circuit Synthesis
  35. Efficient performance modeling via Dual-Prior Bayesian Model Fusion for analog and mixed-signal circuits
  36. Efficient performance modeling of analog integrated circuits via kernel density based sparse regression
  37. Subspace Trajectory Piecewise-Linear Model Order Reduction for Nonlinear Circuits
  38. Improved tangent space based distance metric for accurate lithographic hotspot classification